Implanted integrated resistors are generally formed by implanting ions of a first type of conductivity into a monocrystal semiconductor substrate of the opposite type of conductivity. In this step, a region is formed which is parted from the substrate by a junction.
A junction is the surface (assumed flat, in a first approximation) which, in a semiconductor monocrystal, parts a region of a first type of conductivity from a contiguous region of the opposite type of conductivity. These semiconducting junctions have extremely important properties which are at the origin of the considerable development that the semiconductor integrated circuit technology knows at present.
In a conventional implementation, a silicon monocrystal body of p-type conductivity is coated with an epitaxial layer of n-type conductivity. A P-type region is formed in the epitaxial layer, through a masking layer of silicon dioxide having the required configuration, with the help of a diffusion or ion-implantation process. The p-type region, together with the epitaxial layer, forms a junction which can be utilized for many purposes such as a diode, a collector-base junction of a planar bipolar transistor, a drain region of an isolated gate filed effect transistor, etc.
In any case, whatever be the use of the junction, a paramount parameter, more specifically in the applications to analog integrated circuits, is the breakdown voltage of the junction when the latter is reverse-biased. This breakdown is an electrical phenomenon which, generally, is non-destructive. It is sometimes useful (Zener diodes) but, very often, it is a cause of limitation (or even of rejection) in the use of the device in some applications which require a high breakdown voltage.
The breakdown voltage of a junction V.sub.B depends on many factors, such as, for instance, doping of the contiguous regions, which are determinant of the electrical field in the space charge area. Physically, the breakdown effects result from the valence electrons being extracted from the crystal atoms by the carriers which are accelerated upon application of the electrical field. The so extracted and accelerated electrons, in turn, take part in extracting other electrons, thereby producing an avalanche effect which rapidly increases the reverse current in the junction.
When a junction is conventionally formed through a diffusion process carried out through a hole made in the masking layer of silicon dioxide, there is found a flat junction after redistribution of the dopant, which is formed under the aperture at a distance x.sub.j from the surface (where x.sub.j is the depth of the diffused junction); the dopant, however, is also spread under the masking layer at a distance equal to 0.8 x.sub.j, so that the junction is slightly more cylindrical on its lateral sides, and slightly more spherical at its corners. This is the lateral diffusion effect which is well-known in the art. The electrical field in the space charge region is larger in the cylindrical or spherical portions of the junction than in the flat portion thereof so that the avalanche phenomenon occurs in the former for smaller voltages than in the later. The junction curvature, therefore, decreases the breakdown voltage upon avalanche effect. This very important phenomenon has been studied by Gibbons et al: Effects of Junction Curvatures on Breakdown Voltages in Semiconductors, Solid State Electronics Review, 1966, Vol. 9, pages 831 through 845. The authors have published tables of the values of the breakdown voltages for flat, cylindrical and spherical junctions, for both types of junctions, i.e., abrupt and gradual ones, and for different materials, namely, Ge, Si and GaAs.
The problem is identical in the case of a junction formed by ion-implantation when the sides of the opening made in the masking layer are inclined, which is the general case when the opening is formed by conventional etching steps. The teachings disclosed in the abovementioned literature, therefore, directly apply to implanted resitors.
The problem relative to the breakdown voltage in integrated resistors is of particular importance, not only in high current applications where breakdown voltages higher than 2000 volts are sought, but also in low current applications (logic circuits, memory circuits, analog circuits, . .).
In high current applications, a conventional technique consists in making use of a field attenuation electrode; an example thereof is disclosed in French Pat. No. 71-26688 filed on July 21, 1971. This technique, as a matter of fact, comes to distort that portion of the depletion region which is in the substrate without modifying the shape of the metallurgical junction.
Such a solution requires space on the silicon surface, thereby reducing the integration density.
Another solution, which consists in modifying directly the shape of the junction, is disclosed in French Pat. No. 74-22656, filed on June 28, 1974. In this patent, which discloses an implanted resistor, a masking layer is used which is provided with a notch, which makes it possible to obtain an irregularly-shaped junction which, however, is conventional in the manufacturing of ion-implanted bipolar transistors.
This solution is relatively simple; however, it imperatively demands reoxidation of the silicon exposed in the aperture of the SiO.sub.2 masking layer, and formation of a new photoresistive masking layer (in order to obtain the required masking configuration with the above-mentioned notch); in addition, this type of resistor does not make it possible to optimize both the temperature coefficient of the resistor (TCR) and the breakdown voltage thereof.